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    Digital Xlyns
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Updated Oct 13, 2019, 12:49 PM PST-1
[status] -----------------------------Production Debugger first test passed - singular/aggregate SQL concurrent elastic access
[user case tests left]---------------Indirect access, immediate , indirect LL for write o/f, axioms: match/LUT, Error handling Boolean
[users list] -------------------------Anybody or anything - this Array for any FPGA is free: (files will be posted soon),,,,,,
[specification & semantics] ---- Free online design entry & debug - helping industry achieve memory bandwidth > 1ExaByte/s per chip
[communication] ---------------- Use then a walkthrough, and for more check here for the user manual published at some point
[memory] ------------------------- Any data types or sizes can be saved as JSON/XML/HTML objects, p.ex. this spaceship :

[user interface] : ready and is unique because our users wont have debugging messages and instead will be able to see in everydetail the consequence of their code and when they understand how it works to have the 100% test coverage with a new method based on javascript graphics . It can detail in real measurable time/cycles the interactions, show them in a totally visual manner, like seeing in a time window every detail unfold in slow motion, making it educational and simple for any one to use. One can access the memory using an "array bus" with the totally novel concept of several data streams in the same clock cycle. The whole programming can be defined by the people using it because people can have anything they want anytime. This is the new OS invention where the user is writing his user cases and builds his own OS or uses parts distributed by others or will share. We offer far more than the other OS limited to the old processors, in our case we offer user defined data, self building functions (systolic arrays) and codes running instantly. This is ideal for industry so they can achieve for the best of the futures for all's
Digital Xlyns Inc., WA                   
UBI No. 603351852
(909) 500-3916